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  dual , low power cmos , analog front end with dsp microcomputer data sheet ad7817 / ad7818 rev. d document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their res pective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2012 analog devices, inc. all rights reserved. technical support www.analog.com features 10- bit adc with 9 s conversion time 1 ad7818 and 4 ad7817 single - ended analog input channels on - chip temperature sensor resolution of 0.25c 2c error fr om ? 40c to +85c ? 55c to +125c operating range wide operating supply range: 2.7 v to 5.5 v inherent track - and - hold functionality on - chip reference (2.5 v 1%) overtemperature indicator automatic power - down at the end of a conversion low power operation 4 w at a throughput rate of 10 sps 40 w at a throughput rate of 1 ksps 400 w at a throughput rate of 10 ksps flexible serial interface applications data acquisition systems with ambient temperature monitoring industrial process control automotive battery charging applications functional block dia gram s ad7817 temp sensor v in1 v in2 v in3 v in4 mux agnd dgnd v balance sampling capacitor ref 2.5v ref in oti d out d in sclk rd/wr cs v dd busy convst clock reg control control logic data out a b overtemp reg charge redistribution dac a > b 01316-001 figure 1. ad7817 functional block diagram ad7818 temp sensor v in1 mux agnd v balance sampling capacitor ref 2.5v oti d in/out sclk rd/wr v dd convst clock generator control reg control logic data out a b overtemp reg charge redistribution dac a > b 01316-002 figure 2. ad7818 functional block diagram general description the ad7817 / ad7818 are 10 - bit, single - and 4 - channel analog - to - digital converters ( ad cs) with an on - chip temperature s ensor that can operate from a single 2. 7 v to 5.5 v power supply. each part contains a 9 s successive approximation converter based around a capacitor digital - to - analog converter ( dac ) , an on - chip temperature sensor with an accuracy of 2 c, an on - chip cl ock oscillator, inherent track - and - hold functionality , and an on - chip reference (2.5 v). the on - chip temperature sensor of the ad7817 / ad7818 can be accessed via ch annel 0. when channel 0 is selected and a conversion is initiated, the resulting adc code at the end of the conversion gives a measurement of the ambient temperature with a resolution of 0.25c. see the temperature measurement section. the ad7817 / ad7818 have a flexible serial interface that allows easy interfacing to most microcontrollers. the interface is compatible with th e intel 8051, motorola spi and qspi , and national semiconductors microwire protocol s . for more information , refer to the ad7817 serial interface section and the ad7818 serial interface mode section. the ad7817 is available in a narrow body , 0.15 inch, 16- lead soic and a 16 - lead tssop, and the ad7818 come s in an 8 - lead soic and an 8 - lead msop. product highlights 1. t he devices have an on - chip temperature sensor that allows an accurate measurement of the ambient temperature to be made. the measurable temperature range is ?55c to +125c. 2. an overtemperature indicator is implemented by carrying out a digital comparison of the adc code for channel 0 (temperature sensor) with the contents of the on - chip overtemperature register. the overtemperature indicator pin goes logic low when a predetermined temperature is exceeded. 3. the automatic power - down feature enables the ad7817 and ad7818 to achieve superior power performance at slower throughput rates, that is, 40 w at 1 ksps throughput rate .
ad7817/ad7818 data sheet rev. d | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing characteristics ................................................................ 6 absolute maximum ratings ............................................................ 7 esd caution .................................................................................. 7 pin configurations and function descriptions ........................... 8 terminology .................................................................................... 10 control byte .................................................................................... 11 circuit information .................................................................... 12 converter details ....................................................................... 12 typical connection diagram ................................................... 12 analog inputs .............................................................................. 12 on- chip reference .................................................................... 13 adc transfer function ............................................................. 13 temperature measurement ....................................................... 14 temperature measurement error due to reference error ... 14 self- heating considerations ..................................................... 14 operating modes ........................................................................ 15 power vs. throughput ................................................................ 17 ad7817 serial interface ............................................................. 17 ad7818 serial interface mode ................................................. 18 outline dimensions ....................................................................... 19 ordering guide .......................................................................... 20 revisi on history 10/12 rev. c to rev. d deleted ad7816 .................................................................. universal changes to format ............................................................. universal deleted figure 15; renumbered sequentially ............................. 14 updated outline dimensions ....................................................... 19 changes to ordering guide .......................................................... 20 9/04 rev . b to rev. c changes to ordering guide ............................................................. 6 changes to operating modes section and figure 16 ................ 13 changes to figure 17 ...................................................................... 14 changes to ad7817 serial interface, read operation section and figure 20 ................................................................................... 15 changes to figure 21 ...................................................................... 16
data sheet ad7817/ad7818 rev. d | page 3 of 20 specifications v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.5 v , unless otherwise noted. the ad7817 temperature sensor is specified with an external 2.5 v reference, and the ad7818 temperature sensor is specified with an on - chip reference. for v dd = 2. 7 v, t a = 85c maximum and temperature sensor measurement error = 3c. table 1. parameter a version 1 b version 1 s version 1 unit test conditions/comments dynamic performance ( ad7817 only ) sample r ate = 100 ksps, any channel, f in = 20 khz signal -to - (noise + distortion) ratio 2 58 58 58 db min total harmonic distortion 2 C 65 ?65 ?65 db max ?75 db typical peak harmonic or spurious noise 2 C 65 ?65 ?65 db max ?75 db typical intermodulation distortion 2 fa =19.9 khz, fb = 20.1 khz second - order terms C 67 ?67 ?67 db typ third - order terms C 67 ?67 ?67 db typ channel - to - channel isolation 2 C 80 ?80 ?80 db typ f in = 20 khz dc accuracy ( ad7817 only ) any channel resolution 10 10 10 bits minimum resolution for which no missing codes are guaranteed 10 10 10 relative accuracy 2 1 1 1 lsb max differential nonlinearity 2 1 1 1 lsb max gain error 2 2 2 2 lsb max external reference 10 10 +20/?10 lsb max internal reference gain error match 2 1/2 1/2 1/2 lsb max offset error 2 2 2 2 lsb max offset error match 1/2 1/2 1/2 lsb max temperature sensor ( ad7817 only ) measurement error external reference v ref = 2.5 v ambient temperature 25c 2 1 2 c max t min to t max 3 2 3 c max measurement error on - chip reference ambient t emperature 25c 2.25 2.25 2.25 c max t min to t max 3 3 6 c max temperature resolution 1/4 1/4 1/4 c/lsb reference input ( ad7817 only ) 3 , 4 ref in input voltage range 3 2.625 2.625 2.625 v max 2.5 v + 5% 2.375 2.375 2.375 v min 2.5 v ? 5% input impedance 40 40 40 k? min input capacitance 10 10 10 pf max on - chip reference ( ad7817 o nly ) 5 nominal 2.5 v temperature coefficient 3 80 80 150 ppm/c typ conversion rate ( ad7817 only ) track - and - hold acquisition time 4 400 400 400 ns max source i mpedance < 10 ? conversion time temperature sensor 27 27 27 s max channel 1 to channel 4 9 9 9 s max
ad7817/ad7818 data sheet rev. d | page 4 of 20 parameter a version 1 b version 1 s version 1 unit test conditions/comments power requirements ( ad7817 only ) v dd 5.5 5.5 5.5 v max for specified performance 2.7 2.7 2.7 v min i dd logic inputs = 0 v or v dd normal operation 2 2 2 ma max 1.6 ma typical using external reference 1.75 1.75 1.75 ma max 2.5 v external reference connected power - down (v dd = 5 v) 10 10 12.5 a max 5.5 a typic al power - down (v dd = 3 v) 4 4 4.5 a max 2 a typical auto power - down mode v dd = 3 v 10 sps throughput rate 6.4 6.4 6.4 w typ see the power vs . throughput section for description of power di ssipation in auto power - down mode 1 ksps throughput rate 48.8 48.8 48.8 w typ 10 ksps throughput rate 434 434 434 w typ power - down 12 12 13.5 w max typically 6 w dynamic performance ( ad78 18 only ) 6 sample r ate = 100 ksps, any channel , f in = 20 khz signal -to - (noise + distortion) ratio 2 57 db min total harmonic distortion 2 C 65 db max ?75 db typical peak harmonic or spurious noise 2 C 67 db typ ?75 db typical intermodulation distortion 2 fa = 19.9 khz, fb = 20.1 khz second - or der terms C 67 db typ third - order terms C 67 db typ channel - to - channel isolation 2 C 80 db typ f in = 20 khz dc accuracy ( ad7818 only ) 6 any channel resolution 10 bits minimum resolution for which no missing codes are guaranteed 10 bits relative accuracy 2 1 lsb max differential nonlinearity 2 1 lsb max gain error 2 10 lsb max offset error 2 4 lsb max temperature sensor ( ad7818 only ) 6 measurement error external reference v ref = 2.5 v ambient temperature 25c 2 c max t min to t max 3 c max measurement error on - chip reference ambient temperature 25c 2 c max t min to t max 3 c max temperature resolution 1/4 c/lsb on - chip reference ( ad7818 o nly ) 5 nominal 2.5 v temperature coefficient 3 30 ppm/c typ conversion rate ( ad7818 only ) 6 track - and - hold acquisition time 4 400 ns max source impedance < 10 ? conversion time temperature sensor 27 s max channel 1 9 s max
data sheet ad7817/ad7818 rev. d | pag e 5 of 20 parameter a version 1 b version 1 s version 1 unit test conditions/comments power requirements ( ad7818 only ) 6 v dd 5.5 v max for specified p erformance 2.7 v min i dd logic inputs = 0 v or v dd normal operation 2 ma max 1.3 ma typical using external reference 1.75 ma max 2.5 v external reference connected power - down (v dd = 5 v) 10.75 a max 6 a typ power - down (v dd = 3 v) 4.5 a max 2 a typ auto power - down mode v dd = 3 v 10 sps throughput rate 6.4 w typ see the power vs throughput section for description of power dissipation in auto power - down mode 1 ksps throu ghput rate 48.8 w typ 10 ksps throughput rate 434 w typ power - down 13.5 w max typically 6 w analog inputs ( ad7817 / ad7818 ) 7 input volta ge range v ref v ref v ref v max 0 0 0 v min input leakage 1 1 1 a min input capacitance 10 10 10 pf max logic inputs ( ad7817 / ad7818 ) 4 input high voltage, v inh 2.4 2.4 2.4 v min v dd = 5 v 10% input low voltage, v inl 0.8 0.8 0.8 v max v dd = 5 v 10% input high voltage, v inh 2 2 2 v min v dd = 3 v 10% input low voltage, v inl 0.4 0.4 0.4 v max v dd = 3 v 10% input current, i in 3 3 3 a max typically 10 na, v in = 0 v to v dd input capacitance, c in 10 10 10 pf max logic outputs ( ad7817 / ad7818 ) 4 output high voltage, v oh i source = 200 a 4 4 4 v min v dd = 5 v 10% 2.4 2.4 2.4 v min v dd = 3 v 10% output low voltage, v ol i sink = 200 a 0.4 0.4 0.4 v max v dd = 5 v 10% 0.2 0.2 0.2 v max v dd = 3 v 10% high impedance leakage current 1 1 1 a max high impedance capacitance 15 15 15 pf max 1 the b version and the s version only apply to the ad7817 . the a version applies to the ad7817 or the ad7818 (as stated in specification) . 2 see terminology . 3 the accuracy of the temperature sensor is affected by reference tolerance. the relationship between the two is explained in t he temperature measurement error due to reference error section. 4 sample tested during initial release and after any redesign or process change that may affect this parameter. 5 on - chip reference shuts down when external reference is applied. 6 these specifications are typical for ad7818 at temperatures above 85 c and with v dd greater than 3.6 v. 7 this refers to the input current when the part is not converting. primarily due to the reverse leakage current in the esd pro tection diodes.
ad7817/ad7818 data sheet rev. d | page 6 of 20 timing characteristi cs v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.5 v. all specific ations t min to t max , unless otherwise noted . sample tested during initial release and after any redesign or process changes that may affect th e parameter s . all input signals are measured with tr = tf = 1 ns (10% to 90% of 5 v) and timed from a voltage leve l of 1.6 v. see figure 17, figure 18, figure 21 , and figure 22. table 2 . parameter a version/b version unit test conditions/c omments t power - up 2 s max power - up time from rising edge of convst t 1a 9 s max conversion t ime channel 1 to channel 4 t 1b 27 s max conversion time temperature sensor t 2 20 ns min convst pulse width t 3 50 ns max convst falling edge to busy rising edge t 4 0 ns min cs falling edge to rd/ wr falling edge setup time t 5 0 ns min rd/ wr falling edge to sclk falling edge set up t 6 10 ns min d in setup ti me before sclk rising edge t 7 10 ns min d in hold time after sclk rising edge t 8 40 ns min sclk low pulse width t 9 40 ns min sclk high pulse width t 10 0 ns min cs falling edge to rd/ wr rising edge setup time t 11 0 ns min rd/ wr rising e dge to sclk falling edge setup time t 12 1 20 ns max d out access time after rd/ wr rising edge t 13 1 20 ns max d out access time after sclk falling edge t 14a 1 , 2 30 ns max d out bus relinquish time after falling edge of rd/ wr t 14b 1 , 2 30 ns max d out bus relinquish time after rising edge of cs t 15 150 ns max busy falling edge to oti falling edge t 16 40 ns min rd/ wr rising edge to oti rising edg e t 17 400 ns min sclk rising edge to convst falling edge (acquisition time of t/h) 1 these figures are measured with the load circuit of figure 3 . they are defined as the time required for d out to cross 0.8 v or 2.4 v for v dd = 5 v 10% and 0.4 v or 2 v for v dd = 3 v 10%, as shown in table 1 . 2 these times are derived from the measured time taken by the data outputs to change 0.5 v when loaded with the circuit of figure 3 . the measured number is then extrapolated back to remove the effects of charging or discharging the 50 pf capacitor. this means that the times quoted in t he timing c haracteristics are the true bus relinquish times of the part and as such are independent of the external bus loading capacitances. 200a i ol 200a i ol 1.6v to output pin c l 50pf 01316-003 figure 3 . load circuit for access time and bus relinquish time
data sheet ad7817/ad7818 rev. d | pag e 7 of 20 absolute maximum rat ings t a = 25c unless otherwise no ted. table 3. parameter rating v dd to agnd ?0.3 v to +7 v v dd to dgnd ?0.3 v to +7 v analog input voltage to agnd v in1 to v in4 ?0.3 v to v dd + 0.3 v reference input voltage to agnd 1 ?0.3 v to v dd + 0.3v digital input voltage to dgnd C 0.3 v to v dd + 0.3 v digital output voltage to dgnd C 0.3 v to v dd + 0.3 v storage temperature range ?65c to +150c junction temperature 150c 16- lead tssop, power dissipation 450 mw ja thermal impedance 120c/w lead temperature, soldering 260c vapor phase (60 sec) 215c infrared (15 sec) 220c 16- lead soic package, power dissipation 450 mw ja thermal impedance 100c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c 8- lead soic package, power dissipation 450 mw ja thermal impedance 157c/w lead temperature, solder ing vapor phase (60 sec) 215c infrared (15 sec) 220c 8- lead msop package, power dissipation 450 mw ja thermal impedance 206c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c 1 if the reference input voltage is likely to exceed v dd by more than 0.3 v (that is, during power - up) and the reference is capable of supplying 30 ma or more, it is recommended to use a clamping diode between the ref in pin and v dd pin. connect the diode as shown in this figure. stresses ab ove those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specificati on is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ad7817/ad7818 data sheet rev. d | page 8 of 20 pin configuration s and function descrip tions 1 2 3 4 5 6 7 8 busy oti cs v in1 ref in agnd convst v in2 16 15 14 13 12 11 10 9 sclk d in d out v in4 v in3 v dd dgnd rd/wr ad7817 top view (not to scale) 01316-004 figure 4. ad7817 pin configuration table 4 . ad7817 pin function descriptions pin no. mnemonic description 1 convst logic input signal. the convert start sign al. a 10 - bit analog -to - digital conversion is initiated on the falling edge of this signal. the falling edge of this signal places track - and - hold in hold mode. track - and - hold goes into track mode again at the end of the conversion. the state of the convst signal is checked at the end of a conversion. if it is logic low, the ad7817 power s down . s ee the operating modes section. 2 busy logic output. the busy signal is logic high during a temperature or voltage a/d conversion. the signal can be used to interrupt a microcontroller when a conversion has finished. 3 oti logic output. the overtemperature indicator ( oti ) is set logic lo w if the result of a conversion on channel 0 ( temperature s ensor) is greater that an 8 - bit word in the overtemperature register (otr). the signal is reset at the end of a serial read operation, that is, a rising rd/ wr edge when cs is low. 4 cs logic input signal. the chip select signal is used to enable the serial port of the ad7817 . this is necessary if the ad7817 is sharing the serial bus with more than one device. 5 agnd analog ground. ground reference for track - and - hold comparator and capacitor dac. 6 ref in analog input. an external 2.5 v reference can be connected to the ad7817 at this pin. to enable the on - chip reference , tie the ref in pin to agnd. if an external reference is connected to the ad7817 , the internal reference shut s down. 7 to 10 v in1 to v in4 analog input channels. the ad7817 has four analog input channels. the input channels are single - ended with respect to agnd (analog ground). the input channels can convert voltage signals in the range 0 v to v ref . a channel is selected by writing to the address register of the ad7817 . s ee the control byte section. 11 v dd positive supply voltage, 2.7 v to 5.5 v. 12 dgnd digital groun d. ground reference for digital circuitry. 13 d out logic output w ith a high impedance state. data is clocked out of the ad7817 serial port at this pin. this output goes into a high impedance state on the fa lling edge of rd/ wr or on the rising edge of the cs signal, whichever occurs first. 14 d in logic input. data is clocked into the ad7817 at this pin. 15 sclk clock input for the serial port. the serial clock is used to clock data into and out of the ad7817 . data is clocked out on the falling edge and clocked in on the rising edge. 16 rd/ wr logic input si gnal. the read/write signal is used to indicate to the ad7817 whether the data transfer operation is a read or a write. set t he rd/ wr logic high for a read operation and logic low for a write operation.
data sheet ad7817/ad7818 rev. d | pag e 9 of 20 ad7818 top view (not to scale) convst 1 oti 2 gnd 3 v in 4 rd/wr 8 sclk 7 d in/out 6 v dd 5 01316-005 figure 5. ad7818 pin configuration table 5 . ad7818 pin function descriptions pin no. mnemonic description 1 convst logic input signal. the convert start signal initiates a 10 - bit analog -to - digital conversion on the falling edge of this signal. the falling edge of this signal places track - and - hold in hold mode. track - and - hold g oes into track mode again at the end of the conversion. the state of the convst signal is checked at the end of a conversion. if it is logic low, the ad7818 power s down . s ee the operating modes section. 2 oti logic output. the overtemperature indicator ( oti ) is set logic low if the result of a conversion on channel 0 ( temperature sensor ) is greater that an 8 - bit word in the overtemp erature r egister (otr). the signal is reset at the end of a serial read operation, that is , a rising rd/ wr edge. 3 gnd analog and digital ground. 4 v in analog input channel. the input channel is single - ended with respect to gnd. t he input channel can convert voltage signals in the range 0 v to 2.5 v. the input channel is selected by writing to the address register of the ad7818 . see the control byte section. 5 v dd positive supply voltage , 2.7 v to 5.5 v. 6 d in/out logic input and output. serial data is clocked in and out of the ad7818 at this pin. 7 sclk clock input for the serial port. the serial clock is use d to clock data into and out of the ad7818 . data is clocked out on the falling edge and clocked in on the rising edge. 8 rd/ wr logic input. the read/write signal is used to indicate to the ad7818 whether the next data transfer operation is a read or a write. set t he rd/ wr logic high for a read operation and logic low for a write.
ad7817/ad7818 data sheet rev. d | page 10 of 20 terminology signal -to - (noise + distortion) ratio this is the measured ratio of signal - to - (noise + distortion) at the output of the a/d converter. the signal is the rms amplitude of the fundamental. noise is the rms sum of all nonfundamental signals up to half the sampling frequency (f s /2), excluding dc. the ratio is dependent upon the number of quantization levels in the digitization process; the more levels, the smaller the quantization noise. the theoretical signal - to - (noise + distortion ) ratio for an ideal n - bit converter with a sine wave input is given by: signal- to - ( noise + distortion ) = (6.02 n + 1.76) db thus , for a 10 - bit converter, this is 62 db. total harmonic distortion (thd) thd is the ratio of the rms sum of harmonics to the fundamental . for the ad 7817/ ad7818 , i t is defined as: ( ) 1 2 6 2 5 2 4 2 3 2 2 log20 v vvvvv dbthd ++++ = where: v 1 is the rms amplitude of the fundamental . v 2 , v 3 , v 4 , v 5 , and v 6 are the rms amplitudes of the second through the sixth harmonics. peak harmonic or spurious noise peak harmonic or spurious noise is defined as the ratio of the rms value of the next largest component in the adc output spectrum (up to f s /2 and excluding dc) to the rms value of the fundamental. normally, the value of this specificatio n is determined by the largest harmonic in the spectrum ; however, for parts where the harmonics are buried in the noise floor, it is a noise peak. intermodulation distortion with inputs consisting of sine waves at two frequencies, fa and fb, any active dev ice with nonlinearities create s distortion products at sum and difference frequencies of mfa nfb , where m, n = 0, 1, 2, 3, etc. intermodulation terms are those for which neither m nor n are equal t o zero. for example, the second - order terms include (fa + fb) and (fa ? fb), while the third - order terms include (2fa + fb), (2fa ? fb), (fa + 2fb) , and (fa ? 2fb). the ad7817 / ad7818 are tested using the ccif standard where two input frequencies near the top end of the input bandwidth are used. in this case, the second - and third - order terms are of different significance. the second - order terms are usually distanced in frequency from the original sine waves , while the third - order terms are usually at a frequency close to the input frequencies. as a result, the second - and third - order terms are specified separately. the calculation of the intermodulation distortion is as per the thd specification where it is the ratio of the rms sum of t he individual distortion products to the rms amplitude of the fundamental expressed in dbs. channel -to - channel isolation channel - to - channel isolation is a measure of the level of crosstalk between channels. it is measured by applying a full - scale 20 khz si ne wave signal to one input channel and determining how much that signal is attenuated in each of the other channels. the figure given is the worst case across all four channels. relative accuracy relative accuracy or endpoint nonlinearity is the maximum d eviation from a straight line passing through the endpoints of the adc transfer function. differential nonlinearity this is the difference between the measured and the ideal 1 lsb change between any two adjacent codes in the adc. gain error this is the dev iation of the last code transition (1111 . . . 110) to (1111 . . . 111) from the ideal, that is, vref C 1 lsb, after the offset error has been adjusted out. gain error match this is the difference in gain e rror between any two channels. offset error this i s the deviation of the first code transition (0000 . . . 000) to (0000 . . . 001) from the ideal, that is , agnd + 1 lsb. offset error match this is the difference in offset error between any two channels. track - and - hold acquisition time the t rack - and - hold acquisition time is the time required for the output of the track - and - hold amplifier to reach its final value, within 1/2 lsb, after the end of conversion (the point at which the track - and - hold returns to track mode). it also applies to situations where a change in the selected input channel takes place or where there is a step input change on the input voltage applied to the selected v in input of the ad7817 or the a d7818 . it means that the user must wait for the duration of the track - and - hold acquisition time after the end of conversion or after a channel change/step input change to v in before starting another conversion, to ensure that the part operates to specific ation.
data sheet ad7817/ad7818 rev. d | pag e 11 of 20 control byte the ad7817 / ad7818 contain two on - chip registers, the address register and the overtemperature register . these registers can be accessed by carrying out an 8 - bit serial write operation to the devices. the 8 - bit word or control byte written to the ad7817 / ad7818 is transferred to one of the two on - chip registers as follows. address register if the five msbs of the control byte are logic zero, the three lsbs of the control byte are transferred to the address register ( see figure 6 ) . the address register is a 3 - bi t- wide register used to select the analog input channel on which to carry out a conversion . it is also used to select the temperature sensor, which has the 000 address . table 6 shows the channel selection. the inte rnal reference selection connects the input of the adc to a band gap reference. when this selection is made and a conversion is initiated, the adc output must be approximately midscale. after power - up , the default channel selection is db2 = db1 = db0 = 0 ( temperature sensor ). table 6 . channel selection db2 db1 db0 channel selection device 0 0 0 temperature s ensor all 0 0 1 channel 1 all 0 1 0 channel 2 ad7817 0 1 1 cha nnel 3 ad7817 1 0 0 channel 4 ad7817 1 1 1 internal r ef erence (1.23 v) all overtemperature register if any of the five msbs of the control byte are logic one, the entire eight bits of the control byte are transferred to the overtemperature register ( see figure 6 ) . at the end of a temperature conversion , a digital comparison is carried out between the 8 msbs of the tempera ture conversion result (10 bits) and the contents of the overtemperature register (8 bits). if the result of the temperature conversion is greater tha n the contents of the overtemperature register (otr), the overtemperature indicator ( oti ) goes logic low. the resolution of the otr is 1c. the lowest temperature that can be written to the otr is ?95c and the highest is +152c ( see figure 7 ) . however, the usable temperature range of the temperature sensor is ?55c to +125c. figure 7 shows the otr and how to set t alarm (the tem perature at which the oti goes low). otr (dec) = t alarm (c) + 103c for example, to set t alarm to 50c, otr = 50 + 103 = 153 dec or 10011001 b in. if the result of a temperature conversion exceeds 50c , oti go es logic lo w. the oti logic output is reset high at the end of a serial read operation or if a new temperature measurement is lower than t alarm . the default power on t alarm is 50c. db2 db1 db0 address register lsb msb db0 control byte db7 db6 db5 db4 db3 db2 db1 db0 overtemperature register (otr) db7 db6 db5 db4 db3 db2 db1 if any bit db7 to db3 are logic 0 then db2 to db0 are written to the address register if any bit db7 to db3 is set to a logic 1, then the full 8 bits of the control word are written to the overtemperature register 01316-0 11 figure 6 . address and overtemperature register selection db7 db6 db5 db4 db3 db2 db1 db0 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 minimum temperature = ?95c maximum temperature = +152c msb lsb overtemperature register overtemperature register (dec) = t alarm + 103c t alarm resolution = 18/lsb 01316-012 figure 7 . the overtemperature register (otr)
ad7817/ad7818 data sheet rev. d | page 12 of 20 circuit information the ad7817 / ad7818 are single - and four - channe l, 9 s conversion time, 10 - bit ad c s with an on - chip temperature sensor, reference, and serial interface logic functions on a single chip. the adc section consists of a conventional , successive approximation converter based around a capacitor dac. the ad7817 / ad7818 are capable of running on a 2.7 v to 5.5 v power supply , and they accept a n analog input range of 0 v to v ref . the on - chip temperature sensor allows an ac curate measurement of the ambient device temperature to be made. the working measurement range of the temperature sensor is ?55c to +125c. the ad7817 / ad7818 require a 2.5 v reference, which can be provided from their internal reference or from an external reference source. the on - chip reference is selected by connecting the ref in pin to analog ground. converter details conversion is initiated by pulsing the convst input. the conversion clock for the part is internally gene rated ; therefore, an external clock is not required , except when reading from and writing to the serial port. the on - chip , track - and - hold goes from track mode to hold mode , and the conversion sequence is started on the falling edge of the co nvst signal. at this point , the busy signal goes high and low again 9 s or 27 s later (depending on whether an analog input or the temperature sensor is selected) to indicate the end of the conversion process. a microcontroller can use t his signal to determine when the result of the conversion should be read. the track - and - hold acquisition time of the ad7817 / ad7818 is 400 ns. a temperature measurement is made by selecting the channel 0 of the on - chip mux and carrying out a conversion on this channel. a conversion on channel 0 takes 27 s to complete. temperature measurement is explained in the temperature measurement section. the on - chip reference is not available, however, ref in can be overdriven by an external reference source (2.5 v only). the effect of reference tolerances on temperature measurements is discussed in the temperature measurement error due to reference error section . tie a ll unused analog inputs to a voltage within the nominal analog input range to avoid noise pickup. for minimum power consumption, tie the unused analog inputs to agnd. typical connection d iagram figure 8 shows a typical connection diagram for the ad7817 . the agnd and dgnd are connected together at the device for good noise suppression. the busy line is used to interrupt the microcontroll er at the end of the conversion process , and the seri al interface is implemented using three wires ( see the ad7817 serial interface section for more details ) . an external 2.5 v reference can be connected at the ref in pin. if an external reference is used, connect a 10 f capacitor between ref in and agnd. for applications where power consumption is a concern, use the automatic power - down at the end of a conversion to improve power performance. see the power vs . throughput se ction. a in1 convst agnd dgnd ref in v dd 0.1 f 10f d out rd/wr a in2 a in3 a in4 d in busy oti sclk 3-wire serial interface cs ad7817 microconverter/ microprocessor supply 2.7v to 5.5v optional external reference ad780/ ref-192 0v to 2.5v input 10f external reference 01316-013 figure 8 . typical connection diagram analog inputs analog input figure 9 shows an equivalent circuit of the analog input structure of the ad7817 / ad7818 . the two diodes , d1 and d2 , provide esd protection for the analog inputs. take c are to ensure that the analog input signal never exceeds the supply rails by m ore than 200 mv. this cause s these diodes to become forward - biased and start conducting current into the substrate. the maximum current these diodes can conduct without causing irreversible damage to the part is 20 ma. the c2 capacitor in figure 9 is typically about 4 pf and can mostly be attributed to pin capacitance. the r1 resistor is a lumped component made up of the on resistance of a multiplexer and a switch. this resistor is typically about 1 k . the c1 capacitor is the adc sampling capacitor and has a capacitance of 3 pf. a in d1 c1 3pf v dd d2 c2 4pf v balance convert phase?switch open track phase?switch closed r1 1k? 01316-014 figure 9 . equivalent analog input circuit
data sheet ad7817/ad7818 rev. d | pag e 13 of 20 dc acquisition time the adc starts a new acquisition phase at the end of a conversion and ends on the fal ling edge of the convst signal. at the end of a conversion , a settling time is associated with the sampling circuit. this settling time lasts approximately 100 ns. the analog signal on v in is also being acquired during this settling time. therefore, the minimum acquisition time needed is approximately 100 ns. figure 10 shows the equivalent charging circuit for the sampling capacitor when the adc is in its acquisition phase. r2 represents the source impedance of a buffer amplifier or resistive network, r1 is an internal multiplexer resistance , and c1 is the sampling capacitor. v in c1 3pf r1 1k? r2 01316-015 figure 10 . equivalent sampling circuit during the acquisition phase , the sampling capacitor must be charged to wit hin a 1/2 lsb of its final value. the time it takes to charge the sampling capacitor (t charge ) is given by t charge = 7.6 ( r2 + 1 k? ) 3 pf for small values of source impedance, the settling time associated with the sampling circuit (100 ns) is, in effect, the acquisition time of the adc. for example, with a source impedance (r2) of 10 , the charge time for the sampling capacitor is approximately 23 ns. the charge time becomes significant for source impedances of 1 k ? and greater. ac acquisition time in ac applications , it is recommended to always buffer analog input signals. the source impedance of the drive circuitry must be kept a s low as possible to minimize the acquisition time of the adc. large values of source impedance cause the thd to degrade at high throughput rates. on- chip reference the ad7817 / ad7818 have an on - chip , 1.2 v band gap reference that is gained up to give an output of 2.5 v. b y connecting the ref in pin to analog ground, t he on - chip reference is selected. this selection causes sw1 to open and the reference amp lifier to power up during a conversion (see figure 11) . therefore, the on - chip reference is not available externally. an external 2.5 v reference can be connected to the ref in pin , which has the effect of shutting down the on - chip reference circuitry and reducing i dd by approximately 0.25 ma. 1.2v ref in sw1 2.5v external reference detect buffer 1.2v 26k? 24k? 01316-016 figure 11 . on - chip reference adc transfer functio n the output coding of the ad7817 / ad7818 is straight binary. the designed code transitions occur at successive integer lsb values ( that is , 1 lsb, 2 lsbs, and so on ). the lsb size is = 2.5 v/1024 = 2.44 mv. the ideal transfer characteristic is shown in fi gure 12. analog input 0v 1lsb +2.5v 1lsb 1lsb = 2.5/1024 2.44mv adc code 111...111 111...110 111...000 011...111 000...010 000...001 000...000 01316-017 figure 12 . adc transfer function
ad7817/ad7818 data sheet rev. d | page 14 of 20 temperature measurem ent the on - chip temperature sensor can be accessed via multiplexer channel 0, that is , by writing 0 0 0 to the channel address register. the temperature is also the power on default selection. the transfer characteristic of the temperature sensor is shown in figure 13 . the result of the 10 - bit conversion on channel 0 can be converted to degrees centigrade by the following: t amb = ?103 c + ( adc code /4) ?55c +125c 912dec 192dec temperature adc code 01316-018 figure 13 . temperature sensor transfer characteristics for example, if the result of a conversion on channel 0 was 1000000000 (512 dec), the ambient temperature is equal to ?103c + (512/4) = +25c. table 7 shows some adc codes for various temperatures. table 7 . temperature sensor output adc code temperature 00 1100 0000 ?55c 01 0011 1000 ?25c 01 1001 1100 0c 10 0000 0000 +25c 10 0111 1000 +55 c 11 1001 0000 +125c temperature measurement error due to reference error the ad7817 / ad7818 are trimmed using a precision 2.5 v reference to give the transfer function previously described. to show the effect of the reference tolerance on a temperature reading, the temperature sensor transfer function can be rewritten as a function of the reference voltage and the temperature. code (dec) = ([113.3285 k t ]/[ q v ref ] ? 0.6646) 1024 where: k = boltzmanns constant, 1.38 10 ?23 q = c harge on an electron, 1.6 10 ?19 t = t emperature (k) so, for example, to calculate the adc code at 25 c, code = ([113.3285 298 1.38 10 ?23 ]/[1.6 10 ?19 2.5] ? 0.6646) 1024 = 511.5 (200 hex) as can be seen from the expression, a reference error produce s a gain error. this means that the temperature measurement error due to reference error will be greater at higher temperatures. for example, with a reference error of ? 1% , the measurement error at ? 55c is 2.2 lsbs ( + 0.5c) and 16 lsbs ( + 4c) at + 125c. self - heating consideratio ns the ad7817 / ad7818 have an analog - to - digital conversi on function capable of a throughput rate of 100 ksps. at this throughput rate , the ad7817 / ad7818 consume between 4 mw and 6.5 mw of power. because a thermal impedan ce is associated with the ic package, the temperature of the die rise s as a result of this power dissipation. figure 14 to f igure 16 show the self - heating effect in a 16 - lead soic. figure 14 and figure 15 show the self - heating effect on a two - layer and four - layer pcb. the plots were generated by assembling a heater (resistor) and temperature sensor (diode) in the package being evaluated. in figure 14 , the heater (6 mw) is turned off after 30 sec. the pcb has little influence on the self - heating over the first few seconds after the heater is turned on. this can be more clearly seen in figure 15 where the heater is switched off after 2 sec. f igure 16 shows the relative effects of self - heating in air, fluid , and thermal contact with a large heat sink. 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 ?0.05 0 10 20 30 40 50 60 temperature (c) time (seconds) 2-layer pcb 4-layer pcb 01316-019 figure 14 . self - heating effect 2- layer and 4- layer pcb with the heater (6 mw) turned off after 30 sec 4-layer pcb 2-layer pcb 0.25 0.20 0.15 0.10 0.05 0 ?0.05 0 1 2 3 4 5 temperature (c) time (seconds) 01316-020 figure 15 . self - heating effect 2- layer and 4- layer pcb with the heater switched off after 2 sec
data sheet ad7817/ad7818 rev. d | pag e 15 of 20 figure 16 represent s the worst - case effects of self - heating. the heater delivered 6 mw to the interior of the package in all cases. this power level is equivalent to the adc continuously converting at 100 ksps. the effects of the self - heating can be reduced at lower adc throughput rates by operating in mode 2 (see operating modes section). when operating in this mode, the on - chip power dissipation reduces dramatically and, as a consequence, the self - heating effects. 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ?0.1 0 16141210 8642 temperature (c) time (seconds) air fluid heat sink 01316-021 f igure 16 . self - heating effect in air, fluid, and thermal contact with a heat sink operating modes the ad7817 / ad7818 have two possible modes of operation depending on the state of the convst pulse at the end of a conversion. mode 1 in this mode of operation , the convst pulse is brought high before the end of a conversion, that is , before busy goes low (see figure 17 ). wh en operating in this mode , do not initiate a new conversion until 100 ns after the end of a serial read operation . this quiet time is to allow the track - and - hold to accurately acquire the input signal after a serial read. mode 2 in this mode of operation, ad7817 / ad7818 automatically power down at the end of a conversion (see figure 18). the convst is brought low to initiate a conversion and is left logic low until after the end of the conversion. at this point, that is , when busy goes low, the device s power down. the devices are powered up again on the rising edge of the convst signal. superior power perfo rmance can be achieved in this mode of operation by powering up the ad7817 / ad7818 only to carry out a conversion (see the p ower vs . throughput s ection). in fi gure 18, the cs line is applicable to the ad7817 only.
ad7817/ad7818 data sheet rev. d | page 16 of 20 db7 ? db0 db7(db9) ? db0 d out sclk busy d in oti t 1 t 2 t 3 t 17 t 15 t 16 convst cs rd/wr 01316-023 figure 17 . mode 1 operation db7 ? db0 db7(db9) ? db0 d out sclk busy d in oti convst cs rd/wr t power-up t 1 t 3 t 15 t 16 01316-024 figure 18 . mode 2 operation
data sheet ad7817/ad7818 rev. d | pag e 17 of 20 power vs . throughput superior power performance can be achieved by using the a utomatic power - down (mode 2) at the end of a conversion (see the operating modes section). busy convst t power-up 2s t convert 8s t cycle 100s @ 10ksps 01316-025 figure 19 . automatic power - down figure 19 shows how the automatic power - down is implemented to achieve the optimum power performance from the ad781 7 and ad7818 . the devices operate in mode 2 , and the duration of convst pulse is set equal to the power - up time (2 s). as the throughput rate of the device is reduced , the device remains in its power - down state longer, and the average power consumption over time drops accordingly. for example, if the ad7817 operate s in continuous sampling mode with a throughput rate of 10 ksps, the power consumpti on is calculated as follows. the power dissipation during normal operation is 4.8 mw, v dd = 3 v. if the power - up time is 2 s, and the conversion time is 9 s, the ad7817 can typically dissipate 4.8 mw for 11 s (worst case) during each conversion cycle. if the throughput rate is 10 ksps, the cycle time is 100 s, and the power dissipated while powered up during each cycle is (11/100) (4.8 mw) = 528 w typ ical . power dissipated while powered down during each c ycle is (89/100) (3 v 2 a) = 5.34 w typ. overall power dissipated is 528 w + 5.34 w = 533 w. 10 1 0.1 0.01 0 8070605040302010 power (mw) throughput (khz) 01316-026 figure 20 . power vs. throughput rate ad7817 serial interface the serial interface on the ad7817 is a 5 - wire interface that has read and write capabilities, with data being read from the output register via the d out line and data being written to the control register via the d in line. the ad7817 operates in slave mode and requires an externally applied serial clock to the sclk input to access data from the data register or write to the control byte. the rd/ wr line is used to dete rmine whether data is being written to or read from the ad7817 . when data is being written to the ad7817 , the rd/ wr line is set logic low , and whe n data is being read from the part , the rd/ wr line is set logic high (see figure 21 ). the serial interface on the ad7817 is designed to allow the part to be interfaced to systems that provide a serial clock that is synchronized to the serial data, such as the 80c51, 87c51, 68hc11, 68hc05, and pic16cxx microcontrollers. db9 db8 db7 db0 db1 db7 db6 db5 db1 db0 sclk d in 1 2 3 1 2 3 9 10 rd/wr cs 87 control byte d out t 4 t 5 t 10 t 11 t 8 t 9 t 6 t 7 t 13 t 14a t 14b t 12 01316-027 figure 21 . ad7817 serial interface timing diagram
ad7817/ad7818 data sheet rev. d | page 18 of 20 read operation figure 21 shows the timing diagram for a serial read from the ad7817 . cs is brought low to enable the serial interface , a nd rd/ wr is set logic high to indicate that the data transfer is a serial read from the ad7817 . the rising edge of rd/ wr clocks out the first data bit (db9), subsequent bits are clocked out on the falling edge of sclk (except for the first falling sclk edge) and are valid on the rising edge. during a read operation, 10 bits of data are transferred. however, a choice is available to only clock eight bits if the full 10 bits of the conversion result are not required. the serial data can be accessed in a number of bytes if 10 bits of data are being read. however, rd/ wr must remain high for the duration of the data transfer operation. before starting a new data re ad operation , the rd/ wr signal must be brought low and high again. at the end of the read operation, the d out line enters a high impedance state on the rising edge of the cs , or the falling edge of rd/ wr , whichever occurs first. the readback process is a destructive process , in that once data is read back , it is erased. a conversion must be done again; otherwise , no data is read back. write operation figure 21 also shows the con trol byte write operation to the ad7817 . the rd/ wr input goes low to indicate to the part that a serial write is about to occur. the ad7817 contro l byte is loaded o n the rising edge of the first eight clock cycles of the serial clock with data on all subsequent clock cycles being ignored. to carry out a second successive write operation, the rd/ wr signal must be brought high and lo w again. simplifying the serial interface to minimize the number of interconnect lines to the ad7817 , connect the cs line to dgnd. this is possible if the ad7817 is not sharing the serial bus with another device. it is also possible to tie the d in and d out lines together. this arrangement is compatible with the 8051 microcontroller. the 68hc11, 68hc05, and pic16cxx can be configured to operate with a single serial data line. in this way , the number of lines required to operate the serial interface can be reduced to three, that is, rd/ wr , sclk, and d in /d out (see figure 8 ). ad7818 serial interface mod e the serial interface on the ad7818 is a 3 - wire interface that has read and write capabilities. data is read from the output register and the control byte is written to the ad7818 via the d in /d out line. the ad7818 operates in slave mode and requires an externally applied serial clock to the sclk input to access data from the data register or write to the control byte. the rd/ wr line is used to determine whether data is being written to or read from the ad7818 . when data is being written to the ad7818 , the rd/ wr line is set logic low , and when data is being read from the ad7818 the line is set logic high (see figure 22 ). the serial inter face on ad7818 is designed to allow the ad7818 to interface with systems that provide a serial clock that is synchronized to the serial data, such as the 80c51, 87c51, 68hc11, 68hc05, and pic16cxx microcontrollers. read operation figure 22 shows the timing diagram for a serial read from the ad7818 . the rd/ wr is set logic high to indicate that the data transfer is a serial read from the devices. when rd/ wr is logic high , the d in /d out pin becomes a logic output , and the first data bit (db9) appears on the pin. subsequent bits are clocked out o n the falling edge of sclk, starting with the second sclk falling edge after rd/ wr goes high , and are valid on the rising edge of sclk. ten bits of data are transferred during a read operation. however , a choice is available to only clock eight bits if the full 10 bits of the conversion result are not required. the serial data can be accessed in a number of bytes if 10 bits of data are being read . h owever, rd/ wr must remain high for the duration of the data transfer operation. to carry out a successive read operation , the rd/ wr pin must be brought logic low and high again. at the end of the read operation, the d in /d out pin becomes a logic input on the falling edge of rd/ wr . write opera tion a control byte write operation to the ad7818 is also shown in figure 22 . the rd/ wr input goes low to indicate to the part that a serial write is about to occur. the ad7818 control bytes are loaded on the rising edge of the first eight clock cycles of the serial clock with data on all subsequent clock cycles being ignored. to carry out a successive write to the ad7818 the rd/ wr pin must be brought logic high and low again. sclk d in/out rd/wr t 5 t 7 t 8 t 9 t 11 t 12 t 13 t 14a t 6 1 2 3 1 2 3 9 10 87 control byte db9 db8 db7 db0 db1 db0 db1 db7 db6 db5 01316-028 figure 22 . ad7818 serial interface timing dia gram
data sheet ad7817/ad7818 rev. d | page 19 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 8 5 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 23 . 8 - lead standard small outline package [soic_n] narrow body (r- 8) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equi v alents for reference on ly and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc sea ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 060606- a 45 figure 24 . 16 - lead standard small outline package [soi c_n] narrow body (r- 16) dimensions shown in millimeters and (inches) compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 25 .8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters
ad7817/ad7818 data sheet rev. d | page 20 of 20 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 26 . 16 - lead thin shrink small outline package [tssop] (ru - 16) dimensions shown in millimeters ordering guide model 1 temperature range temperature error at 25c package description package option branding ad7817arz ?40c to +85c 2c 16 - lead soic_n r - 16 ad7817arz - reel ?40c to +85c 2c 16- lead soic_n r- 16 ad7817arz - reel7 ?40c to +85c 2c 16- lead soic_n r- 16 ad7817aru ?40c to +85c 2c 16- lead tssop ru -16 ad7817aru - reel ?40c to +85c 2c 16- lead tsso p ru -16 ad7817aru - reel7 ?40c to +85c 2c 16- lead tssop ru -16 ad7817aruz ?40c to +85c 2c 16- lead tssop ru -16 ad7817aruz - reel ?40c to +85c 2c 16- lead tssop ru -16 ad7817aruz - reel7 ?40c to +85c 2c 16- lead tssop ru -16 ad7817brz ?40c to +85c 2c 16- lead soic_n r- 16 ad7817brz - reel ?40c to +85c 2c 16- lead soic_n r- 16 ad7817brz - reel7 ?40c to +85c 2c 16- lead soic_n r- 16 ad7817bru ?40c to +85c 1c 16- lead tssop ru -16 ad7817bru - reel7 ?40c to +85c 1c 16- lead tssop ru -16 ad7817bruz ?40c to +85c 1c 16- lead tssop ru -16 ad7817bruz - reel ?40c to +85c 1c 16- lead tssop ru -16 ad7817bruz - reel7 ?40c to +85c 1c 16- lead tssop ru -16 ad7817sr ?40c to +85c 2c 16 - lead soic_n r - 16 ad7817sr - reel ?40c to +85c 2 c 16- lead soic_n r- 16 ad7817sr - reel7 ?40c to +85c 2c 16- lead soic_n r- 16 ad7818arz ?40c to +85c 2c 8- lead soic_n r-8 ad7818arz - reel7 ?40c to +85c 2c 8- lead soic_n r-8 ad7818arm ?40c to +85c 2c 8 - lead msop rm - 8 c3a ad7818arm - reel ?4 0c to +85c 2c 8- lead msop rm -8 c3a ad7818arm - reel7 ?40c to +85c 2c 8- lead msop rm -8 c3a ad7818armz ?40c to +85c 2c 8- lead msop rm -8 t1p ad7818armz - reel ?40c to +85c 2c 8- lead msop rm -8 t1p ad7818armz - reel7 ?40c to +85c 2c 8- lead mso p rm -8 t1p 1 z = rohs compliant part. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d01316 -0- 10 /12(d)


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